Nowadays, many semiconductor devices are formed over a single-crystal silicon wafer. To increase production and lower production cost, the diameter of a silicon wafer has gradually increased. Consequently, more silicon chips can be formed over a single wafer. However, due to constraints of a sawing operation and deformation prevention during pressure and thermal processing, a silicon wafer is thinned down to a certain thickness.
In comparative semiconductor manufacturing process, a silicon wafer is first polished to form a mirror surface. The mirror surface of the silicon wafer then undergoes a series of operations including deposition, photolithographic operation, etching, doping and thermal processing to form devices and interconnections. In order to form a thin and lightweight package such as a thin small outline package (TSOP), the thickness of the silicon wafer is further reduced. Therefore, before the silicon chips are sawn out for packaging, a tape is attached to the active surface of the wafer and the back surface is then ground until a thickness of about 100 to 300 micrometers. After the grinding operation, the tape is removed from the active surface. Another tape is attached to the back surface of the wafer and wafer sawing is carried out from the active surface to form a plurality of individual silicon chips. Since the area-to-thickness ratio increases tremendously after wafer grinding, transportation of the ground wafer and the process of removing the tape from the active surface and the subsequent attachment of the tape on the back surface of the wafer often produce cracks on the wafer.
In comparative processes, wafer sawing is conducted after the thickness of the wafer has been reduced by grinding. Cutting of silicon wafer is usually done by running the sawing blade from a top surface of the wafer along kerfs between silicon chips down towards a back surface of the wafer. Because thickness of the wafer has been reduced by grinding, stress created during the sawing operation often produces cracks on the top surface adjacent to the kerfs. Aside from cracks, chipping also contributes additional damages to the top surface of the silicon chip. In subsequent chip packaging operations such as molding or encapsulation, and assembly operations such as surface mounting of the package, the silicon chip is heated. Due to heating, the cracks on the silicon chip may extend. Ultimately, reliability of the product is compromised.